register file
英 [ˈredʒɪstə(r) faɪl]
美 [ˈredʒɪstər faɪl]
网络 寄存器文件; 寄存器堆; 寄存器组; 寄存器集; 寄存器文件模块
双语例句
- It is not just technically minded developers who need to register file changes for a project, but also less technically aware business users who need to manage non-code related artifacts.
这不仅仅是有技术思想的开发人员需要为项目注册文件变更，同时还有少数技术意识业务用户需要管理构件相关的非代码。 - The fundamental problem that FileType solves is the inability of existing Java programs to register file extensions and associate them with an application.
FileType解决的基本问题是：现有Java程序不能登记文件扩展名并把它们与应用程序关联。 - The PPE accesses main storage ( the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
PPE用载入和存储指令访问主存储器（有效地址空间），可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。 - A multi-ported register file is often required by the superscalar microprocessor to handle multiple simultaneous loads and stores, which cause large increase in area and power consumption.
对于流水线型的超大规模微处理器，通常采用多端口的寄存器堆暂存中间数据，这些读写操作势必增加寄存器堆的芯片面积和功耗。 - Full Custom Design and Implementation of High-Speed Register File in X Processor
X处理器中高速寄存器文件全定制设计与实现 - Design of a Register File for SMT Processors Based on EPIC
基于EPIC同时多线程处理器的寄存器堆设计 - A 10-Port High-Speed Register File in DSP
数字信号处理器中10端口高速寄存器文件设计 - This supports a40-entry physical register file that holds temporary write-back results that can complete out of order.
此支持40－物理寄存器文件，此文件含有能混序完成的临时回写结果。 - Design of 6-port High-speed and Low-power Partitioned Register File
高速低功耗6端口分块式寄存器堆的设计 - These results are then committed to a separate architectural register file during in-order retirement.
这些结果然后在有序退回时，存放在一个独立的结构寄存器文件中。 - RISC design is register file operation oriented.
RISC设计是面向寄存器堆操作的。 - An optimized design of register file is critical to the performance of microprocessor.
寄存器文件的优化设计对提高微处理器的性能至关重要。 - Thoroughly investigated the technology of how to optimize the schematic and circuit design of the register file, developed the shared write/ read port, timing-sharing write/ read control circuits, and optimized the storage cell design;
深入研究了通用寄存器文件的逻辑和电路设计优化技术，优化设计了端口共享、读写时间错开式的读写控制电路，并完成了存储体的优化设计； - Then, the thesis, based on March C-algorithm, shadow read and shadow write technologies, put forwards BIST arithmetic for the 20-port register file.
之后本文在MarchC-算法的基础上，结合shadowread和shadowwrite技术，首次提出了针对20端口寄存器文件的BIST算法。 - A new method of reducing the complexity of register file in media processors
一种新的减少媒体处理器中寄存器文件复杂度的方法 - The structure and allocation of the register file is a key factor affecting the performance of software pipelining.
寄存器结构及其分配是软件流水算法的关键之一。 - Finally, the view-generating process of a full-customized barrel shifter module and register file module in a high performance DSP is presented.
最后，介绍了银河飞腾D4高性能DSP中的全定制设计模块桶形移位器与寄存器文件的视图产生过程。 - We know that the access speed of a register file is inversely proportional to its port number.
为了减少寄存器堆的读写端口个数，进而提高寄存器的访问速度，有的处理器要求所有二元操作指令的两个源操作数必须来自不同的寄存器组。 - The thesis, focusing on the 20-port register file, makes a fault analysis, particularly in complex bridge fault and crosstalk coupling fault aroused by word-line and bit-line of 20-port.
本文针对所设计的寄存器文件进行了故障分析，特别对20端口字线、位线引起的复杂桥接故障和串扰导致的耦合故障进行了详尽论述。 - The Study and Full Custom Implementation of Register File
寄存器文件的研究与全定制实现 - At first, we researched the characteristics of the multi-threading architecture as well as the function and structures of register file, and analyzed the relation between process and register window.
我们首先研究了多线程体系结构的特点以及寄存器文件的功能和结构，分析了过程调用与寄存器窗口的关系。 - The experiments show that the memory coloring based framework could efficiently exploit reuse and parallelism, without introducing spills. ( 3) Proposes an optimal directed path searching based stream register file allocation algorithm.
实验表明基于存储器着色的SRF分配框架能够在不引入溢出的前提下，有效地开发复用和并行。（3）提出了基于最佳有向路径寻找的流寄存器文件分配算法。 - Experiments show that the lookup capability of network processor can be effectively improved with only a small number of cache entries per processing element. ( 4) A register file and a novel memory hierarchy component, called Split Control Cache, are proposed for network processors.
实验表明，每个处理单元中只要维护少量的缓存表项，就可使网络处理器的查找能力获得有效的提升。（4）提出了一种网络处理器存储子系统中寄存器堆和cache机制的设计方法。 - The register file is designed to eliminate the bottleneck in I/ O system.
寄存器堆的设计可以解决I/O系统的瓶颈问题。 - There are 3 read ports and 2 write ports in the register file which support 4 threads running in parallel.
本文设计了一款支持多线程的高性能通用寄存器文件，它有3个读端口和2个写端口，支持4线程并行。 - Combining performance with cost implements fault tolerance design of high reliability, low cost register file base on hamming code. 3.
综合考虑性能和代价之后，实现了基于汉明码的高可靠、低代价的寄存器文件容错设计。 - At the point of realization view, we also researched the data coherence strategy management of the double layer register file, and present the ports description and timing design.
从实现的角度，我们还研究了两级寄存器文件的数据一致性管理策略，给出了寄存器文件的端口描述和时序设计，并对设计进行了验证。 - To hide memory latency, NPs employ large register file for large number of registers.
为了隐藏访存延迟，网络处理器往往采用较大的寄存器文件，增加寄存器的数量。 - Then Aiming at the characteristic of the multi-threading environment, we make a particular design for the structure, function and realization of the register file.
然后针对多线程环境的特点，我们对寄存器文件的结构、功能和实现进行了研究和设计。